SPI (Serial Peripheral Interface), MicroWire, I2C, CAN (Controller Area Network), etc. are known as a serial bus often used for personal computers or used in an embedded form. These serial busses are used for connecting peripherals such as for example EEPROMs (Electrically Erasable Programmable Read Only Memories), various types of sensors, input/output controllers, D/A controllers, A/D converters, etc.
When a slave device of a peripheral is to be added to the serial bus of the master device, a slave select signal line (referred to as an “SS (Slave Select) signal line” hereinafter) will generally be added to the master device in a one-to-one connection. This has led to major alterations both in hardware and software. An example of this is a case where when an SPI master device has a first SPI temperature sensor at one board terminal portion of the SPI master device, it is desired that a second SPI temperature sensor be added to another board terminal portion. In the case of SPI, an SS signal line from the SPI master device has to be added newly so that the signal line is connected to the second SPI temperature sensor, which sometimes leads to major design alterations.
Also, in some cases, when it is desired that what kind of slave devices are connected to the master device be detected, it is not possible to find reliably that there are no slave devices because conventional SPI for example is not provided with a function to find a presence or absence of slave devices. When for example master devices, each without a temperature sensor, with one temperature sensor, and with two temperature sensors, are prepared as product configurations, a function that announces each configuration has to be used separately from SPI. Also, software to be embedded has to be prepared for each product configuration and hardware has to be added for announcing the configuration.
As a conventional technique for adding a slave device without adding an SS signal line to the master device, a slave device that can have an ID (identifier) of about two bits is known.
The following technique is also known. A common bus is configured of four lines, i.e., a clock transmission line, a first data transmission line for transmitting data from the master device to a slave device, a second data transmission line for transmitting data from a slave device to the master device and a control signal transmission line. In the above configuration, the device operating as the master device sends a data string containing the device address and serial data of the slave device to which the data is to be transmitted, together with the control signal and the clock signal. A device having the address identical to the received device address operates as a slave device and returns the received data to the master device. Then, receiving the data that was received and returned by the slave device, the master device confirms the operations of the slave device and sends the end-function code in the last portion of a data string (Japanese Laid-open Patent publication No. 05-265948 for example).
However, in the conventional technique of a slave device that can have an ID of about two bits, the number of slave devices of the same type that can be added in parallel depends upon the number of setting pins of the master device, and the number of slave devices that can be added in parallel ranges from four to eight at most.
Also, there is a risk that the slave device disclosed by Patent Document 1, when it is used together with a general SPI slave device, will malfunction upon the transmission, from the master device, of commands indicating the start and end of communications. This sometimes prevents the above conventional slave device from being used together with a general SPI slave device.